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JOP (Java Optimized Processor)
Open-source Java processor core for FPGAs, for embedded real-time developers and researchers.
About JOP (Java Optimized Processor)
JOP (Java Optimized Processor) is a hardware implementation of the Java Virtual Machine, designed to execute Java bytecode directly. It was developed as part of a PhD thesis at the Vienna University of Technology, Austria.
The design aims to be simple and small enough to fit in a low-cost FPGA, with predictable execution time for embedded real-time systems. This lets developers use Java features such as built-in thread support in small embedded projects, without relying on an interpreter or just-in-time compiler.
The complete VHDL source and supporting tools written in Java are available for download. JOP is released under the GNU General Public License, version 3.
- Hardware JVM: executes Java bytecode on an FPGA
- Real-time focus: predictable execution time
- Open source: VHDL source and Java tools included
The site also lists documentation, publications, performance data, example applications, simulation material and teaching resources. Note that the website copyright notice dates from 2000-2007, so check the GitHub repository for current activity.
What it does
Java bytecode in hardwareImplements the Java Virtual Machine as a processor core rather than as software.
Predictable timingDesigned for embedded real-time systems where execution time must be predictable.
Small FPGA footprintCompact design that can be implemented in a low-cost FPGA.
Complete VHDL sourceFull hardware source code is available for download.
Java-based toolsSupporting development tools are written in Java and provided with the source.
Thread supportAllows Java's language-level threading to be used in small embedded systems.
Documentation and teaching materialThe site provides documentation, publications, performance data and teaching resources.
Example boards and applicationsPages cover simulation and boards such as Cyclone and Acex, plus LEGO MindStorms and Java TCP/IP examples.
Requirements & licence
| Runs on | — |
|---|---|
| Internet | Works offline |
| System requirements | Requires an FPGA board and FPGA synthesis tools; Java and VHDL development environment needed. Exact versions not stated on the page. |
| Licence | Open source — GNU General Public License v3 (GPL-3.0) |
| Source code | Source code is available |
| Distribution | Official publisher download |
| Last updated | 30 Oct 2026 |
| Support | Community or self-service |
| Documentation | Read the user guide |
Downloads
Download from the official site
Go to source
From github.com
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